Fully Pipelined Low-Cost and High-Quality Color Demosaicking VLSI Design for Real-Time Video Applications-Reference-Cited by-同舟云学术

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Fully Pipelined Low-Cost and High-Quality Color Demosaicking VLSI Design for Real-Time Video Applications

Published:2015-06 Issue:6 Volume:62 Page:588-592
ISSN:1549-7747
Container-title:IEEE Transactions on Circuits and Systems II: Express Briefs
language:
Short-container-title:IEEE Trans. Circuits Syst. II

Author:

Chen Shih-Lun,Chang Huan-Rui

Funder

National Science Council, R.O.C

National Chip Implementation Center, Taiwan

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/8920/7115238/07051220.pdf?arnumber=7051220

Cited by 14 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Anti-Aliasing and Anti-Color-Artifact Demosaicing for High-Resolution CMOS Image Sensor;IEEE Transactions on Circuits and Systems I: Regular Papers;2023-12

2. Hardware Efficient Edge-Detection Based Color Filter Array Interpolation for Industrial Cameras;2023 IEEE Industrial Electronics and Applications Conference (IEACon);2023-11-06

3. VLSI architecture and implementation of HDR camera signal processor;Journal of Real-Time Image Processing;2023-01-30

4. Low-Power Low-Area Near-Lossless Image Compressor for Wireless Capsule Endoscopy;Circuits, Systems, and Signal Processing;2022-08-27

5. Entropy encoder for low-power low-resources high-quality CFA image compression;Signal Processing: Image Communication;2022-08

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