An improved hardware design for matrix inverse based on systolic array QR decomposition and piecewise polynomial approximation-Reference-Cited by-同舟云学术

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An improved hardware design for matrix inverse based on systolic array QR decomposition and piecewise polynomial approximation

Published:2015-12 Issue: Volume: Page:
ISSN:
Container-title:2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig)
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Author:

Santos L. Canche,Atoche A. Castillo,Castilloy J. Vazquez,Gandaraz O. Longoria,Alvarez R. Carrasco,Aguilar J. Ortegon

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/7390332/7393279/07393290.pdf?arnumber=7393290

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4. FPGA-Based Hardware Matrix Inversion Architecture Using Hybrid Piecewise Polynomial Approximation Systolic Cells;Electronics;2020-01-18

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