Author:
Fell Alexander,Rakossy Zoltan Endre,Chattopadhyay Anupam
Cited by
13 articles.
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1. A Loop Optimization Method for Dataflow Architecture;2022 IEEE 24th Int Conf on High Performance Computing & Communications; 8th Int Conf on Data Science & Systems; 20th Int Conf on Smart City; 8th Int Conf on Dependability in Sensor, Cloud & Big Data Systems & Application (HPCC/DSS/SmartCity/DependSys);2022-12
2. Similarity-Aware Architecture/Compiler Co-Designed Context-Reduction Framework for Modulo-Scheduled CGRA;Electronics;2021-09-09
3. Routability-Enhanced Scheduling for Application Mapping on CGRAs;IEEE Access;2021
4. Stress-Aware Loops Mapping on CGRAs with Dynamic Multi-Map Reconfiguration;IEEE Transactions on Parallel and Distributed Systems;2018-09-01
5. Conflict-Free Loop Mapping for Coarse-Grained Reconfigurable Architecture with Multi-Bank Memory;IEEE Transactions on Parallel and Distributed Systems;2017-09-01