CRUS: A Hardware-Efficient Algorithm Mitigating Highly Nonlinear Weight Update in CIM Crossbar Arrays for Artificial Neural Networks
Author:
Affiliation:
1. Department of ECE, Georgia Institute of Technology, Atlanta, GA, USA
2. Department of ECE and ISRC, Seoul National University, Seoul, South Korea
3. Department of MSE and ISRC, Seoul National University, Seoul, South Korea
Funder
Ministry of Science and ICT, South Korea
Ministry of Trade, Industry & Energy
Brain Korea 21 Plus Project
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Electronic, Optical and Magnetic Materials
Link
http://xplorestaging.ieee.org/ielx7/6570653/9969523/09940271.pdf?arnumber=9940271
Reference43 articles.
1. 3D-stackable crossbar resistive memory based on Field Assisted Superlinear Threshold (FAST) selector
2. Algorithm for Training Neural Networks on Resistive Device Arrays
3. Accelerating machine learning with Non-Volatile Memory: Exploring device and circuit tradeoffs
4. On the noisy gradient descent that generalizes as sgd;wu;Proc Int Conf Mach Learn,2020
5. Mitigating Asymmetric Nonlinear Weight Update Effects in Hardware Neural Network Based on Analog Resistive Synapse
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