A Software-Circuit-Device Co-Optimization Framework for Neuromorphic Inference Circuits

Author:

Quibuyen Paul1ORCID,Jiao Tom1ORCID,Wong Hiu Yung1ORCID

Affiliation:

1. Electrical Engineering Department, San José State University, San Jose, CA, USA

Funder

San José State University College of Engineering Small Group Project Team Fund

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

General Engineering,General Materials Science,General Computer Science,Electrical and Electronic Engineering

Reference40 articles.

1. Study of ReRAM neuromorphic circuit performance using DTCO simulation framework;nguyen,2021

2. Efficient implementation of multi-channel convolution in monolithic 3D ReRAM crossbar;ko;arXiv 2004 00243,2020

3. Optimizing Weight Mapping and Data Flow for Convolutional Neural Networks on RRAM Based Processing-In-Memory Architecture

4. 2022 IEEE 4th international conference on artificial intelligence circuits and systems (AICAS);quibuyen;Proc IEEE 4th Int Conf Artif Intell Circuits Syst (AICAS),2022

Cited by 3 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Stuck-at Faults in ReRAM Neuromorphic Circuit Array and their Correction through Machine Learning;2024 IEEE Latin American Electron Devices Conference (LAEDC);2024-05-08

2. Memristive Devices for Neuromorphic and Deep Learning Applications;Advanced Memory Technology;2023-10-09

3. Effect of ReRAM Neuromorphic Circuit Array Variation and Fault on Inference Accuracy;2022 IEEE 4th International Conference on Artificial Intelligence Circuits and Systems (AICAS);2022-06-13

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