A 42.7Gb/s Optical Receiver With Digital Clock and Data Recovery in 28nm CMOS-Reference-Cited by-同舟云学术

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A 42.7Gb/s Optical Receiver With Digital Clock and Data Recovery in 28nm CMOS

Published:2024 Issue: Volume:12 Page:109900-109911
ISSN:2169-3536
Container-title:IEEE Access
language:
Short-container-title:IEEE Access

Author:

Kang Hyungryul¹^ORCID,Kim Inhyun²,Liu Ruida²,Kumar Ankur²^ORCID,Yi Il-Min³^ORCID,Yuan Yuan⁴^ORCID,Huang Zhihong⁴,Palermo Samuel²^ORCID

Affiliation:

1. Mobile Display Business, Samsung Display, Yongin, South Korea

2. Electrical and Computer Engineering Department, Texas A&M University, College Station, TX, USA

3. School of Electrical Engineering and Computer Science, Gwangju Institute of Science and Technology, Gwangju, South Korea

4. Hewlett Packard Laboratories, Hewlett Packard Enterprise, Milpitas, CA, USA

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Link

http://xplorestaging.ieee.org/ielx8/6287639/10380310/10630516.pdf?arnumber=10630516

Reference27 articles.

1. 1.6 Tbps Silicon Photonics Integrated Circuit and 800 Gbps Photonic Engine for Switch Co-Packaging Demonstration

2. Optical receivers using DFE-IIR equalization

3. 1.25-Gb/s Regulated Cascode CMOS Transimpedance Amplifier for Gigabit Ethernet Applications

4. A 25-Gb/s 2.2-W optical transceiver using an analog FE tolerant to power supply noise and redundant data format conversion in 65-nm CMOS

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