LISA: Graph Neural Network based Portable Mapping on Spatial Accelerators

Author:

Li Zhaoying1,Wu Dan1,Wijerathne Dhananjaya1,Mitra Tulika1

Affiliation:

1. National University of Singapore,School of Computing

Publisher

IEEE

Reference55 articles.

1. Gemmini: An agile systolic array generator enabling systematic evaluations of deep-learning architectures;genc,2019

2. Packing sparse convolutional neural networks for efficient systolic array implementations: Column combining under joint optimization;kung;Proceedings of the fourth international conference on Architectural support for programming languages and operating systems - AS,2019

3. HiMap: Fast and Scalable High-Quality Mapping on CGRA via Hierarchical Abstraction

4. Hybrid optimization/heuristic instruction scheduling for programmable accelerator codesign

5. Graph Minor Approach for Application Mapping on CGRAs

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1. Soter: Analytical Tensor-Architecture Modeling and Automatic Tensor Program Tuning for Spatial Accelerators;2024 ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA);2024-06-29

2. NeuraChip: Accelerating GNN Computations with a Hash-based Decoupled Spatial Accelerator;2024 ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA);2024-06-29

3. TransMap: An Efficient CGRA Mapping Framework via Transformer and Deep Reinforcement Learning;2024 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW);2024-05-27

4. An Architecture-Agnostic Dataflow Mapping Framework on CGRA;2024 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW);2024-05-27

5. E2EMap: End-to-End Reinforcement Learning for CGRA Compilation via Reverse Mapping;2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA);2024-03-02

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