Hybrid optimization/heuristic instruction scheduling for programmable accelerator codesign-Reference-Cited by-同舟云学术

Hybrid optimization/heuristic instruction scheduling for programmable accelerator codesign

Published:2018-11 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 27th International Conference on Parallel Architectures and Compilation Techniques
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Author:

Nowatzki Tony¹,Ardalani Newsha²,Sankaralingam Karthikeyan³,Weng Jian¹

Affiliation:

1. University of California

2. SimpleMachines, Inc.

3. University of Wisconsin-Madison

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3243176.3243212

Reference57 articles.

1. {n. d.}. GAMS http://www.gams.com/. ({n. d.}). {n. d.}. GAMS http://www.gams.com/. ({n. d.}).

2. {n. d.}. IBM ILOG CPLEX https://www.ibm.com/us-en/marketplace/ibm-ilog-cplex. ({n. d.}). {n. d.}. IBM ILOG CPLEX https://www.ibm.com/us-en/marketplace/ibm-ilog-cplex. ({n. d.}).

3. Software pipelining

4. S. Amarasinghe D. R. Karger W. Lee and V. S. Mirrokni. 2002. A Theoretical and Practical Approach to Instruction Scheduling on Spatial Architectures. Technical Report. MIT. S. Amarasinghe D. R. Karger W. Lee and V. S. Mirrokni. 2002. A Theoretical and Practical Approach to Instruction Scheduling on Spatial Architectures. Technical Report. MIT.

5. Functional synthesis of digital systems with TASS

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