A New Capacitorless 1T DRAM Cell: Surrounding Gate MOSFET With Vertical Channel (SGVC Cell)-Reference-Cited by-同舟云学术

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A New Capacitorless 1T DRAM Cell: Surrounding Gate MOSFET With Vertical Channel (SGVC Cell)

Published:2007-05 Issue:3 Volume:6 Page:352-357
ISSN:1536-125X
Container-title:IEEE Transactions On Nanotechnology
language:
Short-container-title:IEEE Trans. Nanotechnology

Author:

Jeong Hoon,Song Ki-Whan,Park Il Han,Kim Tae-Hun,Lee Yeun Seung,Kim Seong-Goo,Seo Jun,Cho Kyoungyong,Lee Kangyoon,Shin Hyungcheol,Lee Jong Duk,Park Byung-Gook

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Computer Science Applications

Link

http://xplorestaging.ieee.org/ielx5/7729/4200718/04200730.pdf?arnumber=4200730

Cited by 40 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Novel 1T-DRAM Fabricated With 22 nm FD-SOI Technology;IEEE Electron Device Letters;2024-04

2. Effect of a ZrO2 Seed Layer on an Hf0.5Zr0.5O2 Ferroelectric Device Fabricated via Plasma Enhanced Atomic Layer Deposition;Materials;2023-02-27

3. A Novel Capacitorless 1T DRAM with Embedded Oxide Layer;Micromachines;2022-10-19

4. Retention Time Analysis in a 1T-DRAM With a Vertical Twin Gate and p⁺/i/n⁺ Silicon Nanowire;IEEE Transactions on Electron Devices;2022-09

5. 3-D stacked polycrystalline-silicon-MOSFET-based capacitorless DRAM with superior immunity to grain-boundary’s influence;Scientific Reports;2022-08-24

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