Technology and circuit design considerations in quasi-planar double-gate SRAM-Reference-Cited by-同舟云学术

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Technology and circuit design considerations in quasi-planar double-gate SRAM

Published:2006-02 Issue:2 Volume:53 Page:242-250
ISSN:0018-9383
Container-title:IEEE Transactions on Electron Devices
language:
Short-container-title:IEEE Trans. Electron Devices

Author:

Ananthan H.,Roy K.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx5/16/33392/01580860.pdf?arnumber=1580860

Cited by 23 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Physics-Based Device-Circuit Cooptimization Scheme for 7-nm Technology Node SRAM Design and Beyond;IEEE Transactions on Electron Devices;2020-03

2. An analytical model to assess DC characteristics of independent gate Si FinFETs;TURKISH JOURNAL OF ELECTRICAL ENGINEERING & COMPUTER SCIENCES;2019-07-26

3. Performance and Variability Analysis of SiNW 6T-SRAM Cell Using Compact Model With Parasitics;IEEE Transactions on Nanotechnology;2017-11

4. Highly flexible SRAM cells based on novel tri-independent-gate FinFET;Superlattices and Microstructures;2017-10

5. Novel tri-independent-gate FinFET for multi-current modes control;Superlattices and Microstructures;2017-09

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