Behavior and test of open-gate defects in FinFET based cells
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/7510593/7519270/07519305.pdf?arnumber=7519305
Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Improving Efficiency of Cell-Aware Fault Modeling By Utilizing Defect-Free Analog Simulation;2023 International Symposium of Electronics Design Automation (ISEDA);2023-05-08
2. Machine Learning Support for Logic Diagnosis and Defect Classification;Machine Learning Support for Fault Diagnosis of System-on-Chip;2022-10-22
3. Comparing the Impact of Power Supply Voltage on CMOS- and FinFET-Based SRAMs in the Presence of Resistive Defects;Journal of Electronic Testing;2020-04
4. Analysis of Bridge Defects in STT-MRAM Cells Under Process Variations and a Robust DFT Technique for Their Detection;VLSI-SoC: Design and Engineering of Electronics Systems Based on New Computing Paradigms;2019
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