Resource Sharing in Dataflow Circuits
Author:
Affiliation:
1. ETH Zürich,Switzerland
2. École Polytechnique Fédérale de Lausanne,Switzerland
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9786061/9786064/09786084.pdf?arnumber=9786084
Reference30 articles.
1. SDC-based modulo scheduling for pipeline synthesis
2. Elastic systems
3. Synthesis of synchronous elastic architectures
4. Balsa: An Asynchronous Hardware Synthesis Language
5. Compositional dataflow circuits
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