System on a Package Innovations With Universal Chiplet Interconnect Express (UCIe) Interconnect
Author:
Affiliation:
1. Data Center and AI Group, Intel Corporation, Santa Clara, CA, USA
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Software
Link
http://xplorestaging.ieee.org/ielx7/40/10063988/10013705.pdf?arnumber=10013705
Reference18 articles.
1. Compute Express Link®: An open industry-standard interconnect enabling heterogeneous data-centric computing
2. Compute eXpress Link 3.0 specification,2022
3. PCI Express® 6.0 Specification at 64.0 GT/s with PAM-4 signaling: a low latency, high bandwidth, high reliability and cost-effective interconnect
4. PCI Express 6.0 Specification: A Low-Latency, High-Bandwidth, High-Reliability, and Cost-Effective Interconnect With 64.0 GT/s PAM-4 Signaling
5. Universal Chiplet Interconnect Express (UCIe): An open standard for developing a successful chiplet ecosystem;sharma,2022
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1. Universal Chiplet Interconnect Express: An Open Industry Standard for Memory and Storage Applications;Computer;2024-01
2. HRFF: Hierarchical and Recursive Floorplanning Framework for NoC-Based Scalable Multidie FPGAs;IEEE Transactions on Circuits and Systems I: Regular Papers;2023-11
3. Chiplet Set For Artificial Intelligence;2023 IEEE International 3D Systems Integration Conference (3DIC);2023-05-10
4. Special Issue on Emerging System Interconnects;IEEE Micro;2023-03-01
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