Digital Versus Analog Artificial Intelligence Accelerators: Advances, trends, and emerging designs

Author:

Seo Jae-sun1,Saikia Jyotishman2,Meng Jian1,He Wangxin2,Suh Han-sok2,Anupreetham 1,Liao Yuan2,Hasssan Ahmed3,Yeo Injune1

Affiliation:

1. School of Electrical, Computer, and Energy Engineering, Arizona State University (ASU), Tempe, Arizona, USA

2. Arizona State University, Tempe, Arizona, USA

3. Department of Electrical Engineering, Sharif College of Engineering and Technology, Lahore, Pakistan

Funder

National Science Foundation

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

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1. Demonstration of transfer learning using 14 nm technology analog ReRAM array;Frontiers in Electronics;2024-01-15

2. Design and Assessment of Hybrid MTJ/CMOS Circuits for In-Memory-Computation;Journal of Low Power Electronics and Applications;2024-01-06

3. Beyond zeros and ones – analog computing in the twenty-first century;International Journal of Parallel, Emergent and Distributed Systems;2023-12-20

4. Static Noise Margin in 16 nm FinFET 6T and 8T SRAM Cells for Compute-in-Memory;2023 30th IEEE International Conference on Electronics, Circuits and Systems (ICECS);2023-12-04

5. End-to-End Benchmarking of Chiplet-Based In-Memory Computing;Neuromorphic Computing;2023-11-15

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