A four-terminal compact model for high voltage diffused resistors with field plates-Reference-Cited by-同舟云学术

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A four-terminal compact model for high voltage diffused resistors with field plates

Published:1998 Issue:9 Volume:33 Page:1453-1458
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Victory J.,McAndrew C.C.,Hall J.,Zunino M.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx4/4/15419/00711347.pdf?arnumber=711347

Cited by 6 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Comprehensive behavioral model of dual-gate high voltage JFET and pinch resistor;Solid-State Electronics;2016-09

2. Dual-Gate JFET Modeling I: Generalization to Include MOS Gates and Efficient Method to Calculate Drain–Source Saturation Voltage;IEEE Transactions on Electron Devices;2016-04

3. Study on Dual Channel n-p-LDMOS Power Devices With Three Terminals;IEEE Transactions on Electron Devices;2013-10

4. Modeling of N-well device and N-well field resistors;Solid-State Electronics;2006-11

5. Non-uniform temperature and heat generation in thin-film SOI LDMOS with uniform drift doping;IEE Proceedings - Circuits, Devices and Systems;2006

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