Author:
Colleman Steven,Verelst Thomas,Mei Linyan,Tuytelaars Tinne,Verhelst Marian
Cited by
3 articles.
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1. A Composable Dynamic Sparse Dataflow Architecture for Efficient Event-based Vision Processing on FPGA;Proceedings of the 2024 ACM/SIGDA International Symposium on Field Programmable Gate Arrays;2024-04
2. COAC: Cross-Layer Optimization of Accelerator Configurability for Efficient CNN Processing;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-07
3. DPACS: Hardware Accelerated Dynamic Neural Network Pruning through Algorithm-Architecture Co-design;Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 2;2023-01-27