Author:
Gerlach Lukas,Paya-Vaya Guillermo,Blume Holger
Cited by
6 articles.
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1. Enhancing a Hearing Aid Processor with ISA Extensions Supporting Flexible Fixed-Point Formats;2024 IEEE 35th International Conference on Application-specific Systems, Architectures and Processors (ASAP);2024-07-24
2. A Graph Neural Network Approach to Improve List Scheduling Heuristics Under Register-Pressure;2024 13th International Conference on Modern Circuits and Systems Technologies (MOCAST);2024-06-26
3. SmartHeaP - A High-level Programmable, Low Power, and Mixed-Signal Hearing Aid SoC in 22nm FD-SOI;ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC);2022-09-19
4. PATARA: A REVERSI-Based Open-Source Tool for Post-Silicon Validation of Processor Cores;2021 10th International Conference on Modern Circuits and Systems Technologies (MOCAST);2021-07-05
5. A Survey on Application Specific Processor Architectures for Digital Hearing Aids;Journal of Signal Processing Systems;2021-03-20