Design and FPGA implementation of sequential digital FIR filter using microprogrammed controller-Reference-Cited by-同舟云学术

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Design and FPGA implementation of sequential digital FIR filter using microprogrammed controller

Published:2012-10 Issue: Volume: Page:
ISSN:
Container-title:2012 IV International Congress on Ultra Modern Telecommunications and Control Systems
language:
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Author:

Qasim Syed Manzoor,BenSaleh Mohammed S.,Bahaidarah Mazen,AlObaisi Hesham,AlSharif Tariq,AlZahrani Mosab,AlOnazi Hani

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/6449582/6459638/06459641.pdf?arnumber=6459641

Cited by 5 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Comparative Analysis of Parallel and Cascaded Architectures for the Realization of High-Speed FIR Filters with FPGA;2023 5th International Conference on Inventive Research in Computing Applications (ICIRCA);2023-08-03

2. Performance Analysis of Clock Gated Coordinate Rotation Digital Computer Based Least Mean Square Filter Design for Video Processing Applications;Journal of Nanoelectronics and Optoelectronics;2021-09-01

3. Towards Optimised FPGA Realisation of Microprogrammed Control Unit Based FIR Filters;Control Theory in Engineering [Working Title];2019-12-20

4. Designing of FIR Filter Using FPGA: A Review;Nanoelectronics, Circuits and Communication Systems;2018-08-02

5. Scalable design of microprogrammed digital FIR filter for sensor processing subsystem;IEICE Electronics Express;2014

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