Chaotic Clock Driven Cryptographic Chip: Towards a DPA Resistant AES Processor-Reference-Cited by-同舟云学术

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Chaotic Clock Driven Cryptographic Chip: Towards a DPA Resistant AES Processor

Published:2020 Issue: Volume: Page:1-1
ISSN:2168-6750
Container-title:IEEE Transactions on Emerging Topics in Computing
language:
Short-container-title:IEEE Trans. Emerg. Topics Comput.

Author:

El-Moursy Ali A.,Darya Abdollah M.,Elwakil Ahmed S.,Jha Abhinand,Majzoub Sohaib

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Computer Science Applications,Human-Computer Interaction,Information Systems,Computer Science (miscellaneous)

Link

http://xplorestaging.ieee.org/ielx7/6245516/6558478/09301437.pdf?arnumber=9301437

Cited by 8 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Spread Spectrum-Based Countermeasures for Cryptographic RISC-V SoC;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2024

2. Dynamic Gold Code-Based Chaotic Clock for Cryptographic Designs to Counter Power Analysis Attacks;Proceedings of the Great Lakes Symposium on VLSI 2023;2023-06-05

3. Compacting Side-Channel Measurements With Amplitude Peak Location Algorithm;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023

4. Trace Alignment Preprocessing in Side-Channel Analysis Using the Adaptive Filter;IEEE Transactions on Information Forensics and Security;2023

5. Using Non-Autonomous Chaotic Clocks to Drive CPA-Resistant AES Cryptographic Chips;IEEE Transactions on Circuits and Systems II: Express Briefs;2022-09

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