Design and Comparative Analysis of 10nm and 16nm Multichannel Nanosheet FinFET with Varying Doping Concentrations
Author:
Affiliation:
1. GRIET,Department of ECE,Hyderabad,India
Funder
All India Council for Technical Education
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10192571/10192589/10192682.pdf?arnumber=10192682
Reference15 articles.
1. Fully Depleted SOI Technology for Millimeter-Wave Integrated Circuits
2. Characterization and Optimization of Inverted-T FinFET Under Nanoscale Dimensions
3. Dimensioning for power and performance under 10nm: The limits of FinFETs scaling
4. Enhanced performance of double gate junctionless field effect transistor by employing rectangular core–shell architecture
5. Insights into the impact of pocket and source elevation in vertical gate elevated source tunnel FET structures;loan;IEEE Transactions on Electron Devices,2018
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