Author:
Mano T.,Wada M.,Ieda N.,Tanimoto M.
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Cited by
19 articles.
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1. Efficient Memory Repair Using Cache-Based Redundancy;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2012-12
2. Redundancy;Integrated Circuits and Systems;2010-11-26
3. Characterization of granularity and redundancy for SRAMs for optimal yield-per-area;2008 IEEE International Conference on Computer Design;2008-10
4. A BISR Architecture for Embedded Memories;2008 14th IEEE International On-Line Testing Symposium;2008-07
5. A physical design tool for built-in self-repairable RAMs;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2001-04