A high performance floating point coprocessor

Author:

Wolrich G.,McLellan E.,Harada L.,Montanaro J.,Yodlowski R.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Cited by 13 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Emerging (un-)reliability based security threats and mitigations for embedded systems;Proceedings of the 2017 International Conference on Compilers, Architectures and Synthesis for Embedded Systems Companion;2017-10-15

2. Utilization Aware Power Management in Reliable and Aggressive Chip Multi Processors;IEEE Transactions on Computers;2016-03-01

3. MAGIC;ACM Transactions on Architecture and Code Optimization;2015-04-16

4. Understanding Variations for Better Adjusting Parallel Supplemental Redundant Executions to Tolerate Timing Faults;IEICE Transactions on Information and Systems;2014

5. Optically-Clocked Instruction Set Extensions for High Efficiency Embedded Processors;IEEE Transactions on Circuits and Systems I: Regular Papers;2012-03

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