Author:
Mahendranath B.,Srinivasulu Avireni
Cited by
3 articles.
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1. PMOS Biased Sense Amplifier Using Cadence Virtuoso With gpdk 90nm Technology;2022 IEEE North Karnataka Subsection Flagship International Conference (NKCon);2022-11-20
2. Design of Low Power PMOS Biased Sense Amplifier Using Lector Approach;2022 IEEE International Conference on Semiconductor Electronics (ICSE);2022-08-15
3. A Low Noise CMOS Digital Output Interface Circuit;Advanced Materials Research;2014-10