IMCS2: Novel Device-to-Architecture Co-Design for Low-Power In-Memory Computing Platform Using Coterminous Spin Switch-Reference-Cited by-同舟云学术

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IMCS2: Novel Device-to-Architecture Co-Design for Low-Power In-Memory Computing Platform Using Coterminous Spin Switch

Published:2018-07 Issue:7 Volume:54 Page:1-14
ISSN:0018-9464
Container-title:IEEE Transactions on Magnetics
language:
Short-container-title:IEEE Trans. Magn.

Author:

Parveen Farhana^ORCID,Angizi Shaahin^ORCID,He Zhezhi^ORCID,Fan Deliang^ORCID

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

https://ieeexplore.ieee.org/ielaam/20/8389221/8344511-aam.pdf

Cited by 9 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Simultaneous Many-Row Activation in Off-the-Shelf DRAM Chips: Experimental Characterization and Analysis;2024 54th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN);2024-06-24

2. pLUTo: Enabling Massively Parallel Computation in DRAM via Lookup Tables;2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO);2022-10

3. A novel dual-reference sensing scheme for computing in memory within STT-MRAM;Microelectronics Journal;2022-03

4. MagCiM: A Flexible and Non-Volatile Computing-in-Memory Processor for Energy-Efficient Logic Computation;IEEE Access;2022

5. Energy-Efficient All-Spin BNN Using Voltage-Controlled Spin-Orbit Torque Device for Digit Recognition;IEEE Transactions on Electron Devices;2021-01

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