State of Art Design: Novel Realization of FinFET based Adder Cells-Reference-Cited by-同舟云学术

State of Art Design: Novel Realization of FinFET based Adder Cells

Published:2022-11-24 Issue: Volume: Page:
ISSN:
Container-title:2022 International Conference on Augmented Intelligence and Sustainable Systems (ICAISS)
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Author:

Raju Puli¹,Vijay Vallabhuni¹,Babu P. Ashok¹,Sridhar P.²

Affiliation:

1. Institute of Aeronautical Engineering Dundigal,Department of Electronics and Communication Engineering,Hyderabad,India,500043

2. Institute of Aeronautical Engineering Dundigal,Department of Electrical and Electronics Engineering,Hyderabad,India,500043

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10010702/10010572/10010868.pdf?arnumber=10010868

Reference19 articles.

1. Single-bit full adder and logic gate based on synthetic antiferromagnetic bilayer skyrmions

2. A low-power dynamic ternary full adder using carbon nanotube field-effect transistors;sardroudi;AEU -International Journal of Electronics and Communications,2021

3. Design of High-Speed Nanoscale Adder Logic Circuit for Low Power Consumption

4. An efficient multiplier by pass transistor logic partial product and a modified hybrid full adder for image processing applications

5. Energy and power efficient system on chip with nanosheet FET;kumar;Journal of Electronics,2019

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1. Analysis of Serial Adder Using FinFET Based GDI Technique;2024 International Conference on Smart Systems for applications in Electrical Sciences (ICSSES);2024-05-03

2. Design and analysis of a novel compact quaternary adder;International Journal of System Assurance Engineering and Management;2024-04-12