An efficient multiplier by pass transistor logic partial product and a modified hybrid full adder for image processing applications-Reference-Cited by-同舟云学术

An efficient multiplier by pass transistor logic partial product and a modified hybrid full adder for image processing applications

Published:2021-12 Issue: Volume:118 Page:105287
ISSN:0026-2692
Container-title:Microelectronics Journal
language:en
Short-container-title:Microelectronics Journal

Author:

Rafiee Mahmood,Pesaran Farshad,Sadeghi Ayoub,Shiri Nabiollah^ORCID

Publisher

Elsevier BV

Subject

General Engineering

Reference42 articles.

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5. Very fast, high-performance 5-2 and 7-2 compressors in CMOS process for rapid parallel accumulations;Fathi;IEEE Trans. Very Large Scale Integr. Syst.,2020

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4. Modern Trends in Improving the Technical Characteristics of Devices and Systems for Digital Image Processing;IEEE Access;2024

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