Author:
Abbasizadeh Hamed,Rikan Behnam Samadpoor,Nga Truong Thi Kim,Kim Kwan-Tae,Kim SungJin,Lee Dong-Soo,Lee Kang-Yoon
Cited by
6 articles.
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1. Design of LDO circuit with low noise and high PSRR;Fourth International Conference on Mechanical, Electronics, and Electrical and Automation Control (METMS 2024);2024-06-05
2. Design of High PSRR and Low Noise for LDO;2023 3rd International Conference on Intelligent Power and Systems (ICIPS);2023-10-20
3. A 18.05 ppm/°C, $38.5\ \mu W$ Bandgap Reference Based on Weak Inversion Region Operation Design;2022 29th IEEE International Conference on Electronics, Circuits and Systems (ICECS);2022-10-24
4. A Design of a Power-Up Circuit for Energy Harvesting Applications;2022 37th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC);2022-07-05
5. An 8–12.5-GHz LC PLL with Dual VCO and Noise-Reduced LDO Regulator for Multilane Multiprotocol SerDes in 28-nm CMOS Technology;Electronics;2021-07-14