Design of CMOS low noise amplifier for 1.57GHz-Reference-Cited by-同舟云学术

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Design of CMOS low noise amplifier for 1.57GHz

Published:2016-01 Issue: Volume: Page:
ISSN:
Container-title:2016 International Conference on Microelectronics, Computing and Communications (MicroCom)
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Author:

Yadav Namrata,Pandey Abhishek,Nath Vijay

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/7505241/7522405/07522438.pdf?arnumber=7522438

Cited by 8 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Design and Optimization of 4-Bit Array Multiplier with Adiabatic Logic Using 65 nm CMOS Technologies;IETE Journal of Research;2023-05-03

2. Design of a 2.45 GHz Cascode Low Noise Amplifier with π Matching Technique;Lecture Notes in Electrical Engineering;2023

3. 3-Stage LNA For High Gain L1 Band Applications Using 180nm CMOS Technology;2022 4th International Conference on Inventive Research in Computing Applications (ICIRCA);2022-09-21

4. Performance Analysis of LNA for IoT Application Using Noise Cancellation Technique;Communications in Computer and Information Science;2021

5. Designing of Low-Noise Amplifier and Voltage-Controlled Oscillator for Satellite Receiver in Ku Band;Nanoelectronics, Circuits and Communication Systems;2020-11-18

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