Compaction of ATPG-generated test sequences for sequential circuits

Author:

Roy R.K.,Niermann T.M.,Patel J.H.,Abraham J.A.,Saleh R.A.

Publisher

IEEE Comput. Soc. Press

Cited by 22 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A Static Test Compaction Method Based on GCN Assisted Fault Gate Classification;2024 IEEE International Test Conference in Asia (ITC-Asia);2024-08-18

2. Expanding a Pool of Functional Test Sequences to Support Test Compaction;2023 IEEE 41st VLSI Test Symposium (VTS);2023-04-24

3. Parallel Multithread Analysis of Extremely Large Simulation Traces;IEEE Access;2022

4. ML-Based Fault Injection for Autonomous Vehicles: A Case for Bayesian Fault Injection;2019 49th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN);2019-06

5. Restoration-Based Merging of Functional Test Sequences;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2017-10

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