Energy-efficient, high-performance, highly-compressed deep neural network design using block-circulant matrices
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/8167715/8203744/08203813.pdf?arnumber=8203813
Cited by 10 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Real block-circulant matrices and DCT-DST algorithm for transformer neural network;Frontiers in Applied Mathematics and Statistics;2023-12-12
2. Low-Area and Low-Power VLSI Architectures for Long Short-Term Memory Networks;IEEE Journal on Emerging and Selected Topics in Circuits and Systems;2023-12
3. Performance-Driven LSTM Accelerator Hardware Using Split-Matrix-Based MVM;Circuits, Systems, and Signal Processing;2023-06-08
4. Architectural Trade-Off Analysis for Accelerating LSTM Network Using Radix-r OBC Scheme;IEEE Transactions on Circuits and Systems I: Regular Papers;2023-01
5. Unconstrained minimization of block-circulant polynomials via semidefinite program in third-order tensor space;Journal of Global Optimization;2022-03-09
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