Structured analog circuit design and MOS transistor decomposition for high accuracy applications
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx5/5638200/5648785/05654264.pdf?arnumber=5654264
Cited by 9 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
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2. A full-transistor fine-grain multilevel delay element with compact regularity layout;Analog Integrated Circuits and Signal Processing;2020-02-03
3. Density Optimization for Analog Layout Based on Transistor-Array;IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences;2019-12-01
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5. DC Characteristics and Variability on 90nm CMOS Transistor Array-Style Analog Layout;ACM Transactions on Design Automation of Electronic Systems;2016-07-26
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