Multi-level approximate logic synthesis under general error constraints

Author:

Miao Jin,Gerstlauer Andreas,Orshansky Michael

Publisher

IEEE

Cited by 31 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

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2. Review of Approximate Computing in Image Processing Applications;2022 4th International Conference on Artificial Intelligence and Speech Technology (AIST);2022-12-09

3. VECBEE: A Versatile Efficiency–Accuracy Configurable Batch Error Estimation Method for Greedy Approximate Logic Synthesis;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2022-11

4. SEALS;Proceedings of the 59th ACM/IEEE Design Automation Conference;2022-07-10

5. Quantified Satisfiability-based Simultaneous Selection of Multiple Local Approximate Changes under Maximum Error Bound;2022 IEEE International Symposium on Circuits and Systems (ISCAS);2022-05-28

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