A Smart Measurement System for the Combined Nanoscale and Device Level Characterization of Electron Devices: Implementation Using Ink-Jet Printing Technologies
Author:
Affiliation:
1. Electronic Engineering Department, Universitat Autònoma de Barcelona, Barcelona, Spain
2. MIND, Electronics and Biomedical Engineering Department and Institute of Nanoscience and Nanotechnology, Universitat de Barcelona, Barcelona, Spain
Funder
VIGILANT Project
AEI/FEDER, UE
Spanish Ministry of Science, Innovation and Universities
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Computer Science Applications
Link
http://xplorestaging.ieee.org/ielx7/7729/10016255/10014664.pdf?arnumber=10014664
Reference54 articles.
1. Nanoscale interface formation and charge transfer in graphene/silicon Schottky junctions; KPFM and CAFM studies
2. Electronic transport at monolayer-bilayer junctions in epitaxial graphene on SiC
3. Filament observation in metal-oxide resistive switching devices
4. Impact of bilayer character on High K gate stack dielectrics breakdown obtained by conductive atomic force microscopy
5. Degradation of polycrystalline HfO2-based gate dielectrics under nanoscale electrical stress
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