50-nm fully depleted SOI CMOS technology with HfO/sub 2/ gate dielectric and TiN gate-Reference-Cited by-同舟云学术

50-nm fully depleted SOI CMOS technology with HfO/sub 2/ gate dielectric and TiN gate

Published:2003-12 Issue:4 Volume:2 Page:324-328
ISSN:1536-125X
Container-title:IEEE Transactions On Nanotechnology
language:en
Short-container-title:IEEE Trans. Nanotechnology

Author:

Vandooren A.,Egley S.,Zavala M.,Stephens T.,Mathew L.,Rossow M.,Thean A.,Barr A.,Shi Z.,White T.,Pham D.,Conner J.,Prabhu L.,Triyoso D.,Schaeffer J.,Roan D.,Bich-Yen Nguyen ,Orlowski M.,Mogab J.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Computer Science Applications

Link

http://xplorestaging.ieee.org/ielx5/7729/28291/01264889.pdf?arnumber=1264889

Cited by 10 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Design and analysis of nano-scaled SOI MOSFET-based ring oscillator circuit for high density ICs;Applied Physics A;2019-07-20

2. Low-temperature electrical characterization of fully depleted eXtra-strained SOI n-MOSFETs with TiN/HfO2 gate stack for the 32-nm technology node;Cryogenics;2009-11

3. Effect of O2Gas during Inductively Coupled O2/Cl2Plasma Etching of Mo and HfO2for Gate Stack Patterning;Japanese Journal of Applied Physics;2008-08-22

4. Effects of additive C4F8 during inductively coupled BCl3∕C4F8∕Ar plasma etching of TaN and HfO2 for gate stack patterning;Journal of Vacuum Science & Technology A: Vacuum, Surfaces, and Films;2007-07

5. Dry etching of TaN∕HfO2 gate-stack structure in BCl3∕Ar∕O2 inductively coupled plasmas;Journal of Vacuum Science & Technology A: Vacuum, Surfaces, and Films;2006-07