Novel Design Methodologies for CNFET-Based Ternary Sequential Logic Circuits
Author:
Affiliation:
1. Department of Electrical and Electronics Engineering, Birla Institute of Technology and Science, Hyderabad, India
Funder
Start-up Research Grant (SRG) by DST-SERB, India
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Computer Science Applications
Link
http://xplorestaging.ieee.org/ielx7/7729/9682520/09802715.pdf?arnumber=9802715
Reference29 articles.
1. Design of CNTFET-Based ternary control unit and memory for a ternary processor
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4. Design of energy-efficient and robust ternary circuits for nanotechnology
5. Design of High Speed Ternary Full Adder and Three-Input XOR Circuits Using CNTFETs
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