Reversible-Logic Design With Online Testability-Reference-Cited by-同舟云学术

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Reversible-Logic Design With Online Testability

Published:2006-04 Issue:2 Volume:55 Page:406-414
ISSN:0018-9456
Container-title:IEEE Transactions on Instrumentation and Measurement
language:en
Short-container-title:IEEE Trans. Instrum. Meas.

Author:

Vasudevan D.P.,Lala P.K.,Di J.,Parkerson J.P.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Instrumentation

Link

http://xplorestaging.ieee.org/ielx5/19/33783/01608582.pdf?arnumber=1608582

Cited by 81 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Novel Design of Area Efficient Full Adder Architecture Using Reversible Logic Gates;2024 7th International Conference on Devices, Circuits and Systems (ICDCS);2024-04-23

2. Revolutionizing Efficiency: A Novel Strategy for Quantum Noise Mitigation;Lecture Notes in Networks and Systems;2024

3. Design and Energy Dissipation Analysis of Full-Adder for Low Power Applications Using Reversible Logic Gates;2023 3rd International Conference on Emerging Frontiers in Electrical and Electronic Technologies (ICEFEET);2023-12-21

4. Design and Implementation of Multi-operative Reversible Gate for Even/Odd Parity Generators in Quantum based Technologies;Journal of Computers, Mechanical and Management;2023-09-30

5. Reversible Logic based Cryptography Design Algorithm using Random Keys;June 2023;2023-06

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