Design and Implementation of Low Power Flash Analog to Digital Converter-Reference-Cited by-同舟云学术

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Design and Implementation of Low Power Flash Analog to Digital Converter

Published:2023-04-05 Issue: Volume: Page:
ISSN:
Container-title:2023 Second International Conference on Electrical, Electronics, Information and Communication Technologies (ICEEICT)
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Author:

Kamate S. S.¹,Rajani H. P.²,Mallaraddi Vidyavati³

Affiliation:

1. HIT,Dept. of Electronics and Communication,Nidasoshi,Karnataka,India

2. Jain college of Engineering,Dept. of Electronics and Communication,Belagavi,Karnataka,India

3. Rural Engineering College,Dept. of Electronics and Communication,Hulkoti,Karnataka,India

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10156871/10156874/10157537.pdf?arnumber=10157537

Reference8 articles.

1. Estimation of static and Dynamic characteristics for 4-bit Flash ADC

2. Low power dynamic comparator for 4 — bit Flash ADC

3. Design of Analog to Digital Converter Using CMOS Logic

4. Design of low power fault tolerant flash ADC for instrumentation applications

5. Design and analysis of high speed and low power 6-bit flash ADC

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Design of Flash ADC with CMOS Logic Using 45nm Technology;2024 Third International Conference on Distributed Computing and Electrical Circuits and Electronics (ICDCECE);2024-04-26

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