Transistor Matrix Array for Measuring Variability and Random Telegraph Noise at Cryogenic Temperatures
Author:
Affiliation:
1. The University of Tokyo,Institute of Industrial Science,Tokyo,Japan
2. National Institute of Advanced Industrial Science and Technology (AIST),Ibaraki,Japan
Funder
Technology Development
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10520250/10520251/10520700.pdf?arnumber=10520700
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3. A 28nm Bulk-CMOS 4-to-8GHz <2mW Cryogenic Pulse Modulator for Scalable Quantum Computing;Bardin;IEEE ISSCC,2019
4. A cryogenic CMOS chip for generating control signals for multiple qubits
5. Characterization and Modeling of 28-nm Bulk CMOS Technology Down to 4.2 K
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