Inductance calculation and optimal pin assignment for the design of pin-grid-array and chip carrier packages-Reference-Cited by-同舟云学术

登录注册会员服务联系我们

Inductance calculation and optimal pin assignment for the design of pin-grid-array and chip carrier packages

Published:1990-03 Issue:1 Volume:13 Page:147-153
ISSN:0148-6411
Container-title:IEEE Transactions on Components, Hybrids, and Manufacturing Technology
language:
Short-container-title:IEEE Trans. Comp., Hybrids, Manufact. Technol.

Author:

Shrivastava U.A.,Bui B.L.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Industrial and Manufacturing Engineering,General Engineering,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx1/33/1905/00052863.pdf?arnumber=52863

Cited by 8 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Robustness enhancement through chip-package co-design for high-speed electronics;Microelectronics Journal;2005-09

2. Current demand balancing: a technique for minimization of current surge in high performance clock-gated microprocessors;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2005-01

3. An automatic router for the pin grid array package;Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198);1999

4. Automatic router for the pin grid array package;IEE Proceedings - Computers and Digital Techniques;1999

5. An inverse method to determine parasitics of power interconnections in high speed electronics;Applied Mathematics and Computation;1995-12

同舟云学术

1.学者识别学者识别

2.学术分析学术分析

3.人才评估人才评估

"同舟云学术"是以全球学者为主线，采集、加工和组织学术论文而形成的新型学术文献查询和分析系统，可以对全球学者进行文献检索和人才价值评估。用户可以通过关注某些学科领域的顶尖人物而持续追踪该领域的学科进展和研究前沿。经过近期的数据扩容，当前同舟云学术共收录了国内外主流学术期刊6万余种，收集的期刊论文及会议论文总量共计约1.5亿篇，并以每天添加12000余篇中外论文的速度递增。我们也可以为用户提供个性化、定制化的学者数据。欢迎来电咨询！咨询电话：010-8811{复制后删除}0370

www.globalauthorid.com

TOP