Automatic router for the pin grid array package-Reference-Cited by-同舟云学术

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Automatic router for the pin grid array package

Published:1999 Issue:6 Volume:146 Page:275
ISSN:1350-2387
Container-title:IEE Proceedings - Computers and Digital Techniques
language:en
Short-container-title:IEE Proc., Comput. Digit. Tech.

Author:

Chen S. -S.,Chen J. -J.,Tsai C. -C.,Chen S. -J.

Publisher

Institution of Engineering and Technology (IET)

Subject

Computational Theory and Mathematics,Hardware and Architecture,Theoretical Computer Science

Link

https://digital-library.theiet.org/content/journals/10.1049/ip-cdt_19990797?crawler=true&mimetype=application/pdf

Reference16 articles.

1. Inductance calculation and optimal pin assignment for the design of pin-grid-array and chip carrier packages

2. Electronic system packaging: the search for manufacturing the optimum in a sea of constraints

3. The VLSI Package-An Analytical Review

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Channel Routing for Microfluidic Devices: A Comprehensive and Accessible Design Tool;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023-02

2. Escaping a Grid by Edge-Disjoint Paths;Algorithmica;2003-05-09

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