A 20Mb Embedded STT-MRAM Array Achieving 72% Write Energy Reduction with Self-termination Write Schemes in 16nm FinFET Logic Process
Author:
Affiliation:
1. Renesas Electronics Corporation,Tokyo,Japan
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9720433/9720494/09720523.pdf?arnumber=9720523
Reference5 articles.
1. Self-Terminated Write-Assist Technique for STT-RAM
2. Write Termination Circuits for RRAM: A Holistic Approach From Technology to Application Considerations
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2. The influence of interface effects on the switching behavior in ultra-scaled MRAM cells;Solid-State Electronics;2023-03
3. In-Memory Computing for Machine Learning and Deep Learning;IEEE Journal of the Electron Devices Society;2023
4. Interface effects in ultra-scaled MRAM cells;Solid-State Electronics;2022-08
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