Interface Engineering of Trench-Ox for Modern DRAM Devices-Reference-Cited by-同舟云学术

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Interface Engineering of Trench-Ox for Modern DRAM Devices

Published:2024-04-14 Issue: Volume: Page:1-4
ISSN:
Container-title:2024 IEEE International Reliability Physics Symposium (IRPS)
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Author:

Hwang Soojung¹,Kim Jongkyu¹,Kim Juntae²,Cha Dahyun²,Kim Minho¹,Jang Dongkyu¹,Cho Sunghak¹,Kim Seokhyang¹,Park Jaeseong¹,Kim Hyungjoon¹,Yu Sukwon¹,Song Boyoung¹,Ban Hyodong¹

Affiliation:

1. DRAM Yield Enhancement, Samsung Electronics Co. Ltd.,Hwasunz-City,Gyeonggi-Do,Korea

2. Memory Diffusion Technology Team, Samsung Electronics Co. Ltd.,Hwasung-City,Gyeonggi-Do,Korea

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10529283/10529298/10529421.pdf?arnumber=10529421

Reference14 articles.

1. Moore's law: past, present and future

2. Characteristics of CMOS device isolation for the ULSI age

3. A variable-stress shallow trench isolation (STL) technology with diffused sidewall doping for submicron CMOS

4. DRAM technology perspective for gigabit era

5. Highly Scalable Saddle-Fin(S-Fin) Transistors for Sub-50nm DRAM Technology;Chung

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