CHOPPER: A Compiler Infrastructure for Programmable Bit-serial SIMD Processing Using Memory in DRAM-Reference-Cited by-同舟云学术

CHOPPER: A Compiler Infrastructure for Programmable Bit-serial SIMD Processing Using Memory in DRAM

Published:2023-02 Issue: Volume: Page:
ISSN:
Container-title:2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA)
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Author:

Peng Xiangjun¹,Wang Yaohua²,Yang Ming-Chang¹

Affiliation:

1. The Chinese University of Hong Kong

2. National University of Defense Technology

Publisher

IEEE

Link

Reference56 articles.

4. Compiling for SIMD Within a Register;fisher;LCPC,1998

5. pLUTo: Enabling Massively Parallel Computation in DRAM via Lookup Tables;ferreira;Micro,2022

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