A Rounding Method to Reduce the Required Multiplier Precision for Goldschmidt Division

Author:

Kong Inwook,Swartzlander Earl E.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Computational Theory and Mathematics,Hardware and Architecture,Theoretical Computer Science,Software

Cited by 11 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Low-Latency High-Throughput Multi-Precision Fused Floating-Point Division and Square-Root Unit Design;2024 International VLSI Symposium on Technology, Systems and Applications (VLSI TSA);2024-04-22

2. Error Analysis for Fused Floating-point Square-root and Division based on Goldschmidt Algorithm;2023 21st IEEE Interregional NEWCAS Conference (NEWCAS);2023-06-26

3. Investigation of Rounding Algorithms Combining Data Distribution Characteristics;2022 IEEE 17th Conference on Industrial Electronics and Applications (ICIEA);2022-12-16

4. High Performance Variable Precision Multiplier and Accumulator Unit for Digital Filter Applications;2021 IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER);2021-11-19

5. Accelerating Latency of Binary Division Through Vedic Methodology;Smart Trends in Computing and Communications: Proceedings of SmartCom 2020;2020-07-18

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