Using Information Flow to Design an ISA that Controls Timing Channels

Author:

Zagieboylo Drew,Suh G. Edward,Myers Andrew C.

Publisher

IEEE

Cited by 12 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. SpecVerilog: Adapting Information Flow Control for Secure Speculation;Proceedings of the 2023 ACM SIGSAC Conference on Computer and Communications Security;2023-11-15

2. SEIF: Augmented Symbolic Execution for Information Flow in Hardware Designs;Proceedings of the 12th International Workshop on Hardware and Architectural Support for Security and Privacy;2023-10-29

3. Security Verification of RISC-V System Based on ISA Level Information Flow Tracking;2023 IEEE 32nd Asian Test Symposium (ATS);2023-10-14

4. Enforcing Fine-grained Constant-time Policies;Proceedings of the 2022 ACM SIGSAC Conference on Computer and Communications Security;2022-11-07

5. Axiomatic hardware-software contracts for security;Proceedings of the 49th Annual International Symposium on Computer Architecture;2022-06-11

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