A 96.5% Efficiency Current Mode Hysteretic Buck Converter With 1.2% Error Auto-Selectable Frequency Locking
Author:
Funder
National Research Foundation of Korea
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/63/8400452/08085164.pdf?arnumber=8085164
Cited by 11 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Use of Threshold Median Adjustment to Achieve Accurate Current Balancing of Interleaved Buck Converter with Constant Frequency Hysteresis Control;Electronics;2024-09-04
2. A Low-Complexity Pure-MOS Sliding-Frequency Semi-Digital Buck DC-DC Converter Based on a Triple-Comparator Structure;IEEE Transactions on Power Electronics;2024-05
3. Current Balancing Strategy based on Threshold Midpoint Adjustment for Interleaved Constant Frequency Hysteresis Control Buck Converter;2023 IEEE 15th International Conference on ASIC (ASICON);2023-10-24
4. A 13.56 MHz Wireless Power Transfer System With Fully Integrated PLL-Based Frequency-Regulated Reconfigurable Duty Control for Implantable Medical Devices;IEEE Transactions on Biomedical Circuits and Systems;2022-12
5. A Reconfigurable DC-DC Converter for Maximum Thermoelectric Energy Harvesting in a Battery-Powered Duty-Cycling Wireless Sensor Node;IEEE Journal of Solid-State Circuits;2022-09
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