FPGA design and verification for lossless ECG coding compression
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/7959757/7968699/07968728.pdf?arnumber=7968728
Cited by 5 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. An Optimized Low-Power VLSI Architecture for ECG/VCG Data Compression for IoHT Wearable Device Application;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-12
2. Real-time hardware architecture of an ECG compression algorithm for IoT health care systems and its VLSI implementation;Multimedia Tools and Applications;2023-09-15
3. FPGA Implementation of Novel Lossless ECG Compression Algorithm for Low Power Devices;2023 4th International Conference on Electronics and Sustainable Communication Systems (ICESC);2023-07-06
4. An efficient priority‐based convolutional auto‐encoder approach for electrocardiogram signal compression in Internet of Things based healthcare system;Transactions on Emerging Telecommunications Technologies;2020-09-28
5. Efficient lossless compression scheme for multi-channel ECG signal processing;Biomedical Signal Processing and Control;2020-05
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