Real-time hardware architecture of an ECG compression algorithm for IoT health care systems and its VLSI implementation-Reference-Cited by-同舟云学术

Real-time hardware architecture of an ECG compression algorithm for IoT health care systems and its VLSI implementation

Published:2023-09-15 Issue: Volume: Page:
ISSN:1573-7721
Container-title:Multimedia Tools and Applications
language:en
Short-container-title:Multimed Tools Appl

Author:

Ez-ziymy Siham^ORCID,Hatim Anas,Hammia Slama

Publisher

Springer Science and Business Media LLC

Subject

Computer Networks and Communications,Hardware and Architecture,Media Technology,Software

Link

https://link.springer.com/content/pdf/10.1007/s11042-023-16631-z.pdf

Reference43 articles.

1. Lin KJ, Huang HH, Lin YY (2018) An FPGA implementation of lossless ECG compressors based on multi-stage Huffman coding. In IEEE 7th global conference on consumer Electronics (GCCE), pp 132–133. https://doi.org/10.1109/GCCE.2018.8574652

2. Wang LH, Chen TY, Lee SY et al (2012) A wireless ECG acquisition SOC for body sensor network, in BioCAS, 2012 IEEE, pp 156–159. https://doi.org/10.1109/BioCAS.2012.6418396

3. Buxi D, Berset T, Hijdra M et al (2012) Wireless 3-lead ECG system with on-board digital signal processing for ambulatory monitoring, Biomedical Circuits, and Systems Conference. (BioCAS), 2012 IEEE, pp 308–311. https://doi.org/10.1109/BioCAS.2012.6418435

4. Martinez J, Almeida R, Olmos S et al (2004) A wavelet-based ECG delineator: evaluation on standard databases, biomedical engineering. IEEE Trans 51(4):570–581

5. Zigel Y, Cohen A, Abu-Ful A, Wagshal A, Katz A (1997) Analysis by synthesis ECG signal compression. In: Proceedings of the Computers in Cardiology, Lund, Sweden, pp 279–282. https://doi.org/10.1109/CIC.1997.647885

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