A 20 GHz high speed, low jitter, high accuracy and wide correction range duty cycle corrector-Reference-Cited by-同舟云学术

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A 20 GHz high speed, low jitter, high accuracy and wide correction range duty cycle corrector

Published:2015-09 Issue: Volume: Page:
ISSN:
Container-title:2015 28th IEEE International System-on-Chip Conference (SOCC)
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Author:

Guo Jun,Liu Peng,Wang Weidong,Chen Jicheng,Jiang Yingtao

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/7363404/7406870/07406901.pdf?arnumber=7406901

Cited by 9 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A 6-Gb/s Wireline Transmitter Design with 3-Tap FFE in 28nm CMOS Technology;2023 IEEE 15th International Conference on ASIC (ASICON);2023-10-24

2. A 3–5 GHz, 108fs-RMS jitter, clock receiver circuit for time-interleaved ADCs with a sampling rate of 4 GS/s;Microelectronics Journal;2023-09

3. A duty cycle corrector with dual loop low pass filter for low jitter and fast correction time;AEU - International Journal of Electronics and Communications;2023-04

4. A 1-5 GHz high speed, low jitter, high accuracy duty-cycle corrector circuit;2022 IEEE 16th International Conference on Solid-State & Integrated Circuit Technology (ICSICT);2022-10-25

5. An accurate peak and noise model of CTLE applied to the front end of CLKRX;2022 IEEE 16th International Conference on Solid-State & Integrated Circuit Technology (ICSICT);2022-10-25

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