A novel multi-chip stacking technology development using a flip-chip embedded interposer carrier integrated in fan-out wafer-level packaging-Reference-Cited by-同舟云学术

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A novel multi-chip stacking technology development using a flip-chip embedded interposer carrier integrated in fan-out wafer-level packaging

Published:2021-06 Issue: Volume: Page:
ISSN:
Container-title:2021 IEEE 71st Electronic Components and Technology Conference (ECTC)
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Author:

Lin Yu-Min,Chiu Wei-Lan,Chen Chao-Jung,Ding Hsiang-En,Lee Ou-Hsiang,Lin Ang-Ying,Cheng Ren-Shin,Wu Sheng-Tsai,Chang Tao-Chih,Chang Hsiang-Hung,Lo Wei-Chung,Lee Chia-Hsin,See Jennifer,Huang Baron,Liu Xiao,Hsiang Te Pei,Lee Chang-Chun

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9501397/9501403/09501513.pdf?arnumber=9501513

Cited by 3 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. State-Of-The-Art of Advanced Packaging;Chiplet Design and Heterogeneous Integration Packaging;2023

2. Multiple System and Heterogeneous Integration with TSV-Less Interposers;Chiplet Design and Heterogeneous Integration Packaging;2023

3. Characteristic Analysis of a Multi-chip Embedded Interposer Carrier using a Wafer-Level Fan-Out Process;2022 International Conference on Electronics Packaging (ICEP);2022-05-11

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